1. Field of the Invention
The present invention relates generally to integrated circuit chip package technology and, more particularly, to a semiconductor package including stacked electronic components which are separated from each other by a spacer, both of the electronic components being electrically connected to an underlying substrate through the use of conductive wires, with the electrical connection of at least one of the conductive wires to the uppermost electronic component of the stack being facilitated by the use of a conductive paste and/or through the use of the spacer.
2. Description of the Related Art
There is currently known in the prior art a specific type of semiconductor package which comprises a substrate having a first electronic component such as an integrated circuit attached to the top surface thereof. Attached to the top surface of the integrated circuit is a spacer which is fabricated from Si coated with aluminum. Attached to the top surface of the spacer is a second electronic component.
In the prior art semiconductor package, conductive wires are used to electrically connect pads or terminals of the first electronic component to the substrate. Similarly, a conductive wire is used to electrically connect a pin disposed on the top surface of the second electronic component and serving as the emitter thereof to the substrate. In the prior art semiconductor package, the second electronic component also includes a collector disposed on the bottom surface thereof, opposite the top surface which includes the pin disposed thereon. Such collector typically has a layer of gold plating applied thereto. The proper operation of the second electronic component within the semiconductor package necessitates that the collector be placed into electrical connection with the substrate. In the prior art semiconductor package, such electrical connection is facilitated by attaching the bottom surface of the second electronic component, which defines the collector, to the aluminum-coated spacer through the use of a layer of a conductive paste. With the collector of the second electronic component being electrically connected thereto via the conductive paste layer, the spacer is in turn electrically connected to the substrate through the use of a conductive wire. In the prior art semiconductor package, a portion of the substrate, the first electronic component or integrated circuit, the spacer, the second electronic component, and the wires are each covered by a package body.
The prior art semiconductor package described above suffers from a substantial deficiency. More particularly, with regard to the aluminum-coated Si spacer integrated into the semiconductor package, such spacer normally has a native layer of aluminum oxide disposed on the top surface to which one end of the wire extending to the substrate is electrically connected and to which the collector of the second electronic component is electrically connected by the conductive paste layer. The native aluminum oxide layer is typically in the thickness range of from about ten to fifty angstroms. It is been determined that the aluminum oxide layer of the spacer acts as a dielectric layer of a capacitor, and that during the first time power-up of the prior art semiconductor package, causes a substantial time delay in such power-up.
Due to any first time power-up delay in the prior art semiconductor package being highly undesirable, attempts have been made in the prior art to eliminate such delay. Such solutions have included plasma cleaning the aluminum-coated spacer in an attempt to remove the native oxide layer and/or increasing the percentage of the area of the bottom surface of the second electronic component defining the collector thereof which is electrically connected to the spacer through the use of the conductive paste layer. However, none of the attempted solutions highlighted have proven to be effective in achieving acceptable start-up time parameters in the first power-up cycle of the prior art semiconductor package that are consistent to those which are typically measured in second and subsequent power-up cycles thereof. In this regard, despite increasing the percentage of that area of the second electronic component defining the collector electrically connected to the spacer through the use of the conductive paste layer and/or plasma cleaning the spacer, the adverse effect of the aluminum oxide layer of the spacer as a capacitor is still prevalent in the prior art semiconductor package.
The present invention provides a novel, unique solution to the power-up delay problem highlighted above. The solution provided by the present invention is discussed in detail below.